CMF
Combination Module: 8-Ch. A/D (±100 V) and 8-Ch. D/A (±10.0 V @ 10 mA)
The CMF smart function module provides a combined function alternative which mitigates SWaP-C (Size, Weight, Power, & Cost) system integration and configuration challenges. The CMF function essentially combines two of NAI’s popular functions onto a single-slot function module:
Analog-to-Digital (A/D) I/O Interface : The CMF smart function provides an Analog-to-Digital (A/D) I/O Interface (like the ADF smart function module) with eight (8) independent 16-bit Successive Approximation Register (SAR) A/D input channels which support a maximum input voltage range of ±100 V.
Digital-to-Analog (D/A) I/O Interface : The CMF smart function provides a Digital-to-Analog (D/A) I/O Interface (like the DA2 smart function module) with eight (8) independent 16-bit D/A output channels which offers ±10 VDC output with a maximum current of 10 mA.
By integrating these functionalities into a single module, the CMF streamlines system architecture, enhancing efficiency and reducing complexity in various system applications.
Features
- Analog-to-Digital (A/D) I/O Features:
- Number of Channels: 8
- ADC Type/Architecture: SAR/Individual
- Key Characteristics Range (max): ±100 V
- Field programmable input range/polarity for each channel
- Fixed, second-order, anti-aliasing input filter & digital, second-order IIR and low-pass output filter equipped on each channel
- Continuous background Built-In-Test (BIT)
- Extended A/D FIFO buffering capabilities for enhanced storage and management of incoming signal sample
- Digital-to-Analog (D/A) I/O Features:
- Number of Channels: 8
- ±10 VDC output with a maximum current of 10 mA
- High-quality 16-bit/channel D/A conversion
- Continuous background BIT for comprehensive system diagnostics
- Extended D/A output FIFO buffering capabilities for efficient signal processing and management
- Analog-to-Digital (A/D) I/O Interface: see below
- Type/ID: (Voltage Input Only) maximum input range: ±100V
- Resolution: 16-bit SAR A/D converters. Simultaneous sampling.
- Input Format: Differential voltage (may be used as single-ended by grounding one input).
- Input Scaling: Eight (8) bipolar or unipolar channels (voltage only). Programmable, per channel, as Full Scale (FS) range inputs where range is -FS to +FS or 0 to FS. 100.0, 50.0, 25.0, 12.5 or 6.25 volts. The ability to set lower voltages for FS assures the utilization of the full resolution.
- Overvoltage Protection: 286 V continuous
- Input Impedance: 205 kΩ min. / 416 kΩ ( kΩ (Differential)
- INL (Linearity): 0.05% FS range over temperature
- Gain Error: ±0.1% FS range
- Offset Error: Greater of ±0.04% FS range or ±5 mV
- Sampling Rate (Programmable): 200 kSPS maximum (decimation at slower sample rate < 100 kHz, 1 kHz minimum)
- Data Buffering/Triggering: Independent FIFO sample capture with programmable options (1M x 32-bit data elements per channel). See Operations Manual for details.
- Acquisition/Conversion Time: 5.5 μs at 200 kHz sampling rate. See manual for conversion time at lower sample rates.
- Programmable Filter: Each channel incorporates a fixed second order anti-aliasing filter (30 kHz bandwidth) and a post filter that has a digitally adjustable -3 dB break point programmable up to 90 kHz.
- Common Mode Rejection: 90 dB min. at 60 Hz. Roll off to 50 dB min. at 10 kHz
- Signal-to-Noise Ratio (SNR): Minimum of 65 dB
- Common Mode Voltage: Signal voltage plus Common mode voltage is 270 volts. Note: A/D differential inputs must not “float”. Input source must have return path to CMRP (CMF=CH 8-Lo)
- Output Logic: Bipolar output in two's complement. Bipolar output range from FFFF 8000 max. negative; 0000 7FFF is max. positive (FS). Unipolar output range from 0 to 0000 FFFF (FS) (Voltage Ranges only)
- Digital-to-Analog (D/A) I/O Interface: see below
- Resolution: 16-bit/channel for voltage command modes.
- Output Format: Single-ended
- Output Range: ±10 VDC, ±5 VDC, ±2.5 VDC, 0 to 10 VDC, 0 to 5 VDC; range programmable for each channel; 10 mA max per channel.
- Output and Ground Impedance: < 1.5 Ω for each output
- System Protection: Output is set to open circuit at reset or power on
- Linearity Error: ±0.10% FS range (FSR) over temperature
- Offset Error: ±3 mV
- Gain Error: ±0.10% FSR ± 0.02% x (maximum current in load (mA)), per channel. Example: The channel is expected to operate @ 2.5 mA maximum, therefore the effective gain error calculates to: (±0.10%) ± (0.02% x 2.5) = ±0.15% FSR
- Settling Time: 15 µs typical (25 µs maximum)
- Data Buffer: FIFO, 1 M x 8 channels elements deep. See Operations Manual for functional details.
- Load: Can drive a capacitive load of 0.1 μF, 10 mA/CH max. ±0.063% / FSR (V) x (the cumulative maximum ∆ current in the other 7 channel loads (mA)). Example: Four channels @ 2.5 mA & three channels @ 5 mA, max., @ ±10 V range, so, the error calculates to: (±0.063 / 20) * (±25) = ±0.08% maximum (@ FSR of ±10 V, this specific example). (Source or Sink). Short circuit protected. When current exceeds 10 mA for I2T calculation, that channel is set to open circuit and a flag is set.
- Update Rate: 400 µs (2.5 kHz max.) to 40 µs (25 kHz max.) per channel
- General: see below
- Power: 5 VDC @ 500 mA (typ.) ±12VDC @ 185 mA (typ.), quiescent; Add 1 mA per 1 mA load per channel in ±12 VDC power supplies (for D/A function channels). Ground isolated (250 V minimum peak isolation)
- Ground: Isolated (250 V minimum peak isolation) from system power/ground. A/D channel inputs are differential, referenced to isolated module AGND. D/A channel outputs are single ended, referenced to isolated module AGND (or GND-DA).
- ESD Protection: Designed to meet the testing requirements of IEC 61000-4-2 (formerly 801-2) Level 2. (4 KV transient with a first peak current of 7.5 A and TRcR out to ~60 ns).
- Weight: 1.75 oz. (50 g)
4/30/2024 10:36:51 AM
4/30/2024 10:37:10 AM
NAI’s Configurable Open Systems Architecture™ (COSA®) offers a choice of over 100 smart I/O, communication, and Ethernet switch functions, providing the highest package density and greatest flexibility of any multifunction I/O board in the industry. Preexisting, fully-tested functions can be combined quickly and easily in an unlimited number of ways. Choose the ideal platform for your application below. Each I/O function has dedicated processing, unburdening the system Single Board Computer (SBC) from unnecessary data management overhead.
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