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VR1

8 Channels, Differential Input

The VR1 provides eight isolated, wide voltage input range Variable Reluctance (VR) signal or general-purpose Pulse Counter measurement interfaces. Channels can be programmed to operate individually or combined in pairs.

The VR1 provides several measurements of the signal characteristics including:

Monopole type/mode: Signal Amplitude measured as the absolute value of the maximum positive or negative peak, Signal Frequency, Period of the signal, RPM based on number of teeth on wheel sensor.

Dipole type/mode: Phase measurement between interposed signal trains (either single or paired channel mode)

The VR1 sensor interface is ideal for speed sensing for aircraft, marine or automotive crankshafts, camshafts, brake or gear rotors, transmission shafts, etc. and is uniquely designed to process signals as a general-purpose counter, that can operate and process a wide variety of AC and DC input signals > ±100 V or as low as ±25 mV. The VR1 provides the user with pulse counts and frequency to 100 kHz.

Features
  • Variable Reluctance Interface: 8 isolated, differential input channels: Independent, or paired mode, Large voltage range input: ±25 mV to ±100 V, Large pulse train rate detection: 8 ns resolution (to be characterized)
  • General Purpose Counter: 32-bit; Pulse count: Single channel: Increment, decrement; Paired channel: UP/DOWN A, UP/DOWN B and UP/DOWN A-B (Quadrature)
  • Frequency: 100 kHz (maximum, continuous) (to be characterized)
  • Standard NAI COSA Smart Functions: Up to 8 VR / Counter channels
  • Independent Channel Configuration: Programmable parameters for interfacing with different sensor types, Independent or paired mode
  • Isolated Channels: Mitigates ‘noise’ false trigger count
  • Built-In-Test (BIT)

Specifications
  • Channels: 8, Differential Input
  • Operation Mode: VR Pulse Timing & Count, GP Pulse Counter, Individual Channel or in Paired Mode.
  • Input Voltage Range: ±25 mV to ±100 V (minimum to be characterized)
  • Input Voltage Protection: Signal clamped at ±110 V
  • Input Impedance: 750 kΩ, < 100 pF
  • Input Pulse Resolution: 8 ns (to be characterized)
  • Counter Resolution: 32-bit
  • Pulse Count Modes: Increment, decrement, quadrature (paired mode)
  • Build-In-Test (BIT): Continuous background BIT, OPEN detection capability (pending, to be characterized)
  • Power: +5 VDC @ 750 mA typ. (Estimated, TBD)
  • Ground: Independent channels, isolated in pairs; module is isolated from system ground.
  • Weight: 1.5 oz. (42 g)
  • ESD Protection: Designed to meet the testing requirements of IEC 801-2 Level 2. (4 kV transient with a peak current of 7.5 A and a Tc of approximately 60 ns)
Block Diagram

(Click diagram to enlarge)

Documentation
4/21/2021 1:11:02 PM
4/21/2021 1:11:15 PM
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