Modules SC1, SC2, and SC7 - (RS-232/422/485/423) Sync/Async
Modules SC1 (non-isolated), SC2 (isolated), and SC7 (non-isolated) are NAI’s latest generation Serial Communication (RS-232/422/485/423) Modules. These sophisticated, high-speed, modules are used on our multifunction embedded boards and SBCs. They support intelligent, full duplex, independent, multi-channels that can be individually software-configured for either RS-232C, RS-422, RS-485, RS-423 (w/data and/or clk bit inversion for MIL-STD-188C unbalanced interface support), or synchronous or asynchronous communications. SC7 is the same as SC1 except SC7 reallocates the pins used for CTS Flow Control as four (4) additional system grounds.
The modules feature four programmable channels. Each channel can be programmed into a Loop-Back mode that internally wraps the transmitter around the receiver without the need of external wiring. Each channel also has its own Transmit and Receive buffers and the total aggregate buffer allocation is user-configurable/programmable up to 32 MB.
The modules can operate in an Interrupt-Driven Environment to provide notification of all events to the system. When a flow control mode is selected, the module performs the operation automatically with minimal system intervention. The module also can operate in Multi-Drop Link Mode, where the transmitters and receivers on up to 32 cards are tied together in either half- or full-duplex mode.
The architecture avoids latency problems because all data transfer is done in hardware rather than software. Any incoming data can be immediately extracted, no matter how many channels are active and regardless of the mode. A BREAK sequence capability is also incorporated. Bus data is transferred within 300 ns. The FPGA design simplifies programming and usage.
Features:
- Each channel can be programmed into a Loop-Back mode that internally wraps the transmitter around the receiver without the need of external wiring.
- An additional asynchronous mode to support “Immediate Transmit” operation results in Serial Data Transmit Enhancement. Each channel has its own Transmit and Receive buffer where total aggregate buffer allocation is user configurable/programmable up to 64 MB.
- A Receiver Enable/Disable function allows the user to turn selected receivers ON/OFF.
- This serial card can operate in an Interrupt-Driven Environment to provide notification of all events to the system. When a flow control mode is selected, the serial card does the operation automatically with minimal system intervention.
- Multi-Drop Link Mode: The transmitter and receivers of up to 32 cards can be tied together in either Half or Full-Duplex mode.
- Built-in Test
SC3 (RS-232/422/485) Async
Serial Communication Module SC3 provides 8 high-speed, programmable RS-232, RS-422, RS-485, non-isolated communication channels. Each channel is programmable for either Serial Communications (SC) protocol or General Purpose I/O (GPIO) modes as either RS-422 (differential), RS-485 (differential) or RS-232 (single ended) hardware level interfaces. Each channel has one Tx and one Rx signal pair (+/-) available as applicable.
Features:
- Eight (8) high-speed, programmable RS-232, RS-422, RS-485, non-isolated communication channels
- Data transfers within 300 ns, no latency issues
- A Receiver Enable/Disable function allows the user to turn selected receivers ON/OFF.
- This serial card can operate in an Interrupt-Driven Environment to provide notification of all events to the system. When a flow control mode is selected, the serial card does the operation automatically with minimal system intervention.
- Configurable Receive and Transmit buffers (up to 32MB, aggregate)
The module can be individually software configured for RS-232C, RS-422 or RS-485 Asynchronous Communication. Support for bit polarity inversion capability on TxD, RxD is also provided. The architecture avoids latency problems because all data transfer is done in hardware and not in software. Any incoming data, no matter how many channels are active, in whatever mode, can be immediately extracted. A BREAK sequence capability is also incorporated. FPGA design simplifies programming and usage.
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