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TL1

24 TTL Channels, Programmable I/O

Function module TL1 provides 24 channels of TTL/CMOS transceiver functionality as either inputs or outputs. The transistor-transistor logic (TTL) employs transmitters with multiple emitters in gates having more than one input. TTL offers high switching speed and relative immunity to noisy systems. CMOS sensors provide image sensing technology by converting light waves into signals that are small bursts of current. These waves can be light or other electromagnetic radiation.

When programmed as inputs, status and/or interrupts can be enabled for each channel to indicate either transition on rising edge or transition on falling edge, as well as current state. Debounce circuits for each channel offer a selectable time delay. This eliminates false signals resulting from contact bounce commonly experienced with mechanical relays and switches. Each TTL/CMOS channel has an internal 100 kohm pull-down resistor. All inputs are continually scanned.

When programmed as outputs, the channels can be programmed to output the commanded state from either an internally generated 3.3 V power supply, or from an externally provided VCC supply (up to 5.5 V max).

Continuous Background Built-in-Test (BIT) status provides real-time channel health for mission-critical systems. This feature runs in the background and is transparent in normal operations. When the channels are programmed as inputs, a redundant, read-back circuit continually scans each channel to verify the input. When the channels are programmed as outputs, the readback circuit is compared with the commanded output logic.

Features
  • 24 channels available as inputs or outputs
  • Programmable debounce circuitry with selectable time delay eliminates false signals resulting from relay contact bounce
  • Built-In-Test runs in background constantly monitoring system health for each channel

Specifications
  • Input Levels: TTL and CMOS compatible, single ended inputs. Each channel incorporates a 100 kΩ pull down resistor (contact factory regarding special configurations requiring inputs with 100 kΩ pull-up resistor(s)).
  • V in L: ≤ 0.8 V = “0”
  • V in H: ≥ 2.0 V = “1”
  • V in Max.: 5.5 V
  • I in: +50 µA
  • Read Delay: 300 ns (pending characterization)
  • Debounce: Programmable from 0 to 32.36 sec.; LSB= 8 ns. (pending characterization)
  • Output Levels: TTL/CMOS, single ended outputs (internal or external VCC selectable)
  • Drive Capability: V out L: 0.55 V max. Low level output current: 24 mA (sink) V out H: 2.4 V min. High level output current 24 mA (source)
  • Rise/Fall Time: 10 ns into a 50 pf load
  • Write Delay: 300 ns (pending characterization)
  • Power: 5 VDC @ 75 mA unloaded (max. 650 mA, with all channels at full source) (pending characterization)
  • Ground: All grounds are common and connected/referenced to system ground.
  • Weight: 1.5 oz. (42 g)
Block Diagram

(Click diagram to enlarge)

Documentation
5/13/2021 4:04:06 PM
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